项目作者: muhammadaldacher

项目描述 :
This project shows how to model a 4-bit flash ADC and a 4-bit DAC using ideal components. Used vdc, vpulse, vcvs, switch, res, cap, vccs to construct the 4-bit ADC based on the flash architecture. Models are built in Cadence using ideal components & VerilogA blocks, & Analysis is done on Matlab.
高级语言: MATLAB
项目地址: git://github.com/muhammadaldacher/Modeling-of-4-bit-Flash-ADC-and-4-bit-DAC.git